1. Field of the Invention
The present invention relates to an active matrix type liquid crystal display apparatus and a driving method therefor.
2. Description of the Related Art
The active matrix type liquid crystal display apparatus controls a transmittance (luminance) of each pixel by a RMS value of a voltage applied thereto. In this liquid crystal display apparatus, as illustrated in FIG. 2, one pixel includes one MOS type transistor. Moreover, the gate is connected to a gate electrode that the pixels in a transverse direction include in common, and the drain is connected to a drain electrode that the pixels in a longitudinal direction include in common. Also, the source is connected to a common electrode that all the pixels include in common and that is positioned on the side opposite to the source with a liquid crystal cell located in between. As illustrated in FIG. 3, the driving method for the display apparatus is as follows: An active state (in FIG. 3, xe2x80x9chighxe2x80x9d) of a scan line signal, which indicates a scan line to be scanned, is applied to each of the gate electrodes in time-division. In accordance with gray-scale information of display data on the line the scan line signal of which is switched into the active state, a one-level gray-scale voltage is selected out of a plurality of levels, then being applied to the drain electrode. Also, a voltage becoming the reference is applied to the common electrode. This procedure holds, in the respective liquid crystal cells in the line sequence, a gray-scale voltage to be applied at the end of a gate-on state. Namely, it becomes possible to control the applied RMS voltage (luminance) to each pixel in correspondence with display data.
Also, as another driving method, there exists a method disclosed in JP-A-10-54998. In this method, as illustrated in FIG. 4, one pixel includes two MOS transistors. For example, in the first MOS transistor, the gate is connected to the first gate electrode that the pixels in a longitudinal direction include in common, and the drain is connected to a drain electrode that all the pixels include in common, and the source is connected to a drain of the second MOS transistor. Also, in the second MOS transistor, the gate is connected to the second gate electrode that the pixels in a transverse direction include in common, and the source is connected to a common electrode that all the pixels include in common and that is positioned on the side opposite to the source with a liquid crystal cell located in between. As illustrated in FIG. 5, the driving method is as follows: An active state (in FIG. 5, xe2x80x9chighxe2x80x9d) of a scan line signal, which indicates a scan line to be scanned, is applied to each of the second gate electrodes in time-division. In accordance with gray-scale information of display data on the scan line, a gray-scale voltage control signal with a pulse-width corresponding to the gray-scale information is applied to the first gate electrode. Furthermore, a gray-scale voltage, which is in synchronization with a scanning time-period for one line and has, for example, a ramp waveform, is applied to the drain electrode. Also, a voltage becoming the reference is applied to the common electrode. This procedure holds, in the respective liquid crystal cells in the line sequence, a gray-scale voltage level to be reached at the end of a state where the first and the second gates becomes gate-on simultaneously. Accordingly, as is the case with the former method, it becomes possible to control the applied RMS voltage to each pixel in correspondence with display data.
In the method described earlier, as the number of gray-scales (the number of colors) to be displayed is increased, the number of levels of a gray-scale voltage to be prepared is increased. This condition has resulted in increases in the numbers of gray-scale voltage generating output amplifiers and of gray-scale voltage selecting switches, thereby bringing about a problem of a rising in the cost.
Also, for example, if the above-described method is applied to the liquid crystal display apparatus where peripheral driving circuits and the pixels are formed integrally, it turns out that the above-described output amplifiers and selecting switches are also formed in portions of the peripheral driving circuits. This has resulted in a problem that a variation in the characteristics of these elements gives rise to a deterioration in the picture quality.
Also, in the method described later, the pulse-width of the gray-scale voltage control signal makes it possible to control the transmittance of each liquid crystal cell. This brings about an advantage that, even if the number of gray-scales is increased, there is little increase in the circuit scale. Moreover, since all the peripheral circuits can be configured using digital circuits, there exists an effect of suppressing the above-described variation. In this method, however, two MOS transistors are located within one pixel. This condition causes new problems to occur, such as a decrease in the pixel transmittance and a decrease in the yield.
It is an object of the present invention to provide the active matrix type liquid crystal display apparatus and the driving method therefor, the liquid crystal display apparatus making it possible to prevent the deterioration in the picture quality caused by the inconsistency in the characteristics of the circuit elements.
In solving the above-described problems, at first, let""s consider the operation of the MOS transistor in the pixel: In the case where the MOS transistor is of, for example, N type, if an electric potential of the gate is higher than that of the source by the amount of a fixed value or more, the gate is switched into the ON state and thus an electric current is caused to flow between the drain and the source. As a result, a voltage between the drain electrode and the common electrode is applied to the liquid crystal cell. Meanwhile, if the electric potential of the gate is lower than those of the source and the drain, the gate is switched into the OFF state and thus no electric current is caused to flow between the drain and the source. As a result, the voltage that has been applied to the liquid crystal cell at the time of the gate-on is held thereto.
Taking advantage of this operational characteristic in the present invention, gates in pixels on a scan line to be scanned are switched ON and gates in pixels existing on non-scan lines other than the scan line are switched OFF, thereby allowing the line sequence scanning to be executed.
Meanwhile, in the above-described method disclosed in JP-A-10-54998 as well where the gray-scale voltage control signal with the pulse-width in accordance with the gray-scale information is applied to the gate electrode, it is required to perform the control of applying the gray-scale voltage only to the pixels existing on the scan line to be scanned. For this purpose, the second MOS transistor is employed, which allows this control to be implemented.
However, even if the second MOS transistor is not employed, in the following manner for example, it is possible to apply the gray-scale voltage only to the pixels existing on the scan line: The common electrodes are separated in such a manner that they correspond to each of the transverse lines. Then, an electric potential at which the gray-scale voltage control signal is xe2x80x9chighxe2x80x9d and the gates are switched into the ON state is provided to the common electrodes existing on the scan line to be scanned. Moreover, an electric potential that is higher than the electric potential at which the gray-scale voltage control signal is xe2x80x9chighxe2x80x9d is provided to the drain electrodes and the common electrodes existing on the non-scan lines other than the scan line.
In view of the above-described points, the present invention implements an active matrix type liquid crystal display apparatus utilizing the pulse-width, and a driving method therefor.
Namely, the liquid crystal display apparatus according to the present invention is characterized by the following: One pixel includes one MOS type transistor of, for example, N type. Moreover, the gate is connected to a gate electrode that the pixels in a longitudinal direction include in common, and the drain is connected to a drain electrode that the pixels in a transverse direction include in common. Also, the source is connected to a common electrode that the pixels in the transverse direction include in common and that is positioned on the side opposite to the source with a liquid crystal cell located in between.
The driving method for the liquid crystal display apparatus according to the present invention is as follows: An active state of a scan line signal, which indicates a scan line to be scanned, is applied to each of the common electrodes in time-division. In accordance with gray-scale information of display data on the scan line, a gray-scale voltage control signal with a pulse-width corresponding to the gray-scale information is applied to the gate electrode.
Here, in the case where the MOS transistor is of N type, the active state of the scan line signal is xe2x80x9clowxe2x80x9d and the electric potential thereof is equal to an electric potential at which the gray-scale voltage control signal is xe2x80x9chighxe2x80x9d and the gate in the MOS transistor is switched into the ON state. Also, a non-active state of the scan line signal is xe2x80x9chighxe2x80x9d and the electric potential thereof is higher than the electric potential at which the gray-scale voltage control signal is xe2x80x9chighxe2x80x9d.
Meanwhile, in the case where the MOS transistor is of P type, the active state of the scan line signal is xe2x80x9chighxe2x80x9d and the electric potential thereof is equal to an electric potential at which the gray-scale voltage control signal is xe2x80x9clowxe2x80x9d and the gate in the MOS transistor is switched into the ON state. Also, the non-active state of the scan line signal is xe2x80x9clowxe2x80x9d and the electric potential thereof is lower than the electric potential at which the gray-scale voltage control signal is xe2x80x9clowxe2x80x9d.
Furthermore, the same electric potential as those of the xe2x80x9chighxe2x80x9d and the xe2x80x9clowxe2x80x9d states of the scan line signal which, are applied to the same pixel is defined as a reference electric potential of a gray-scale voltage applied to the above-described drain electrode.
As described above, according to the active matrix type liquid crystal display apparatus in the present invention and the driving method therefor, one MOS transistor is located within one pixel, and the pulse-width of the gray-scale voltage control signal makes it possible to control the transmittance of each liquid crystal cell.
Further, the present invention is characterized by an active matrix type liquid crystal display apparatus including, on an inner surface of one of two substrates that are oppositely located with a liquid crystal layer placed therebetween, a plurality of common electrodes and a plurality of gate electrodes intersecting to each other, and a plurality of drain electrodes arranged in parallel to the common electrodes, and a display pixel unit having a plurality of pixels, each of the plurality of pixels including a three-terminal switching element and a liquid crystal cell at each of intersection points of the plurality of common electrodes and the plurality of gate electrodes. Herein, the first terminal of each switching element is connected to each drain electrode, the second terminal of each switching element being connected to each liquid crystal cell the opposite side of which is connected to each common electrode, the third terminal of each switching element being connected to each gate electrode. In the active matrix type liquid crystal display apparatus, each switching element is switched into the ON state when an electric potential difference between a voltage applied to each gate electrode and a voltage applied to each common electrode becomes equal to a specific defined value. Moreover, in the ON state of each switching element, an electric potential difference between a voltage applied to each drain electrode and the voltage applied to each common electrode is applied to each liquid crystal cell. Furthermore, an electric potential difference applied at the end of the ON state is held until the next ON state.
Here, the above-described active matrix type liquid crystal display apparatus further includes a peripheral circuit. Here, the peripheral circuit includes a scan signal driving circuit for applying an active state of a scan line signal to each common electrode in sequence on one scanning time-period basis, the scan line signal indicating a scan line to be scanned, a gray-scale voltage circuit for applying a gray-scale voltage to each drain electrode, and a data signal driving circuit for applying a gray-scale voltage control signal with a pulse-width corresponding to the gray-scale information of display data of a pixel applied by an active state of scanning line signal to the gate electrode. Moreover, it is preferable that the gray-scale voltage circuit includes a voltage waveform generating circuit for generating a voltage the waveform of which is varied with a lapse of time with a predetermined characteristic, and a plurality of gray-scale voltage selecting circuits located for each scan line for applying, to each drain electrode, the voltage waveform generated by the voltage waveform generating circuit, the gray-scale voltage selecting circuits applying the voltage waveform only for a time-period corresponding to the pulse-width of the gray-scale voltage control signal in the case where the scan line to be scanned has been selected.
Further, it is preferable that the above-described display pixel unit and the above-described peripheral circuit be formed integrally on one and the same substrate of the two substrates.
Still further, the present invention is characterized by a driving method of driving an active matrix type liquid crystal display apparatus, the active matrix type liquid crystal display apparatus including, on an inner surface of one of two substrates that are oppositely located with a liquid crystal layer placed therebetween, a plurality of common electrodes and a plurality of gate electrodes intersecting to each other, and a plurality of drain electrodes arranged in parallel to the common electrodes, and a plurality of pixels, each of the plurality of pixels including a three-terminal switching element and a liquid crystal cell at each of intersection points of the plurality of common electrodes and the plurality of gate electrodes. Here, the driving method including the steps of connecting the first terminal of each switching element to each drain electrode, connecting the second terminal of each switching element to each liquid crystal cell the opposite side of which is connected to each common electrode, connecting the third terminal of each switching element to each gate electrode, applying an active state of a scan line signal to each common electrode in sequence on one scanning time-period basis, the scan line signal indicating a scan line to be scanned, applying a gray-scale voltage to each drain electrode, a reference electric potential of the gray-scale voltage being defined as an electric potential that is the same as electric potentials of the active state and a non-active state of the scan line signal which are applied to one and the same pixel, and complying with gray-scale information of display data of a pixel so as to apply, to each gate electrode, a gray-scale voltage control signal with a pulse-width corresponding to the gray-scale information, the active state of the scan line signal being applied to the pixel.
Here, the following configuration may be allowable: The gray-scale voltage applied to each drain electrode exhibits a polarity with reference to the reference electric potential, the polarity in the first half of the one scanning time-period being different from that in the second half of the one scanning time-period. In addition, the driving method further includes a step of generating, with a time-period employed as a target, the pulse-width of the gray-scale voltage control signal applied to each gate electrode, the time-period being either the first half or the second half of the one scanning time-period, the time-period employed as the target differing between the gate electrodes adjacent to each other.
Further, the following configuration may be allowable: The driving method further includes the steps of providing electric potentials of active states of two types as the scan line signal applied to each common electrode, and applying the electric potentials of the two types for each line alternately.
Further, it is preferable that the above-described gray-scale voltage be of either a ramp waveform or a waveform, the waveform having a preset characteristic curve that corresponds to characteristics such as an applied voltage-transmittance characteristic (xcex3 characteristic) of the liquid crystal cell.
Still further, the following configuration may be allowable: The driving method further includes the steps of providing, as the gray-scale voltage, two types of symmetrical waveforms that vary from the reference electric potential into a direction of a positive polarity and that of a negative polarity, outputting the two types of waveforms every one scanning time-period alternately, and when an attention is focused on a certain one scanning time-period in one frame, outputting the two types of waveforms every one frame alternately, the electric potential being maintained to be constant in the beginning time-period and the ending time-period of the one scanning time-period.
Further, it is preferable to set an electric potential in advance so that the transmittance of the liquid crystal cell becomes its maximum or minimum, the above-described gray-scale voltage attaining to the electric potential at the end of the one scanning time-period from the reference electric potential.
Still further, the present invention is characterized by a data signal driving circuit for receiving, as inputs, display data, a signal in synchronization with: the display data, a signal in synchronization with one scanning time-period, and a signal for indicating an effective time-period of the display data, and for converting gray-scale information of the display data into pulse-width information so as to output the pulse-width information toward a plurality of channels, the data signal driving circuit including a latch circuit for fetching the display data by the amount of one line, a data pulse generating circuit for generating different types of pulse-width signals the number of which corresponds to the number of gray-scales of the display data, a reference clock generating circuit for generating a reference clock of the pulse-width signals, a data pulse selector for selecting a single pulse-width signal from the pulse-width signal group by the number of the gray-scales in accordance with the gray-scale information of the display data to output the single pulse-width therefrom, and an output buffer for converting electric potentials of xe2x80x9chighxe2x80x9d and xe2x80x9clowxe2x80x9d of the pulse-width signal into predetermined electric potentials so as to output the predetermined electric potentials as gray-scale voltage control signals, the pulse-width signal being outputted by the data pulse selector.
Further, the following configuration may be allowable: The above-described data signal driving circuit includes a latch circuit for fetching the display data by the amount of one line, a data pulse generating circuit for generating, for each odd number channel or even number channel, different types of pulse-width signals the number of which corresponds to the number of gray-scales of the display data, a reference clock generating circuit for generating a reference clock of the pulse-width signals, a data pulse selector for the odd number channels for selecting a single pulse-width signal from the pulse-width signal group for the odd number channels by the number of the gray-scales in accordance with the gray-scale information of the display data to output the single pulse-width signal therefrom, a data pulse selector for the even number channels for selecting a single pulse-width signal from the pulse-width signal group for the even channels by the number of the gray-scales in accordance with the gray-scale information of the display data to output the single pulse-width signal therefrom, and an output buffer for converting electric potentials of xe2x80x9chighxe2x80x9d and xe2x80x9clowxe2x80x9d of the pulse-width signal into desired electric potentials so as to output the desired electric potentials as gray-scale voltage control signals, the pulse-width signal being outputted by the data pulse selector for the odd number channels or the data pulse selector for the even number channels. Here, the data signal driving circuit is characterized by the following condition: The pulse-width signal for the odd number channels is generated with the second half of the one scanning time-period employed as a target, and the pulse-width signal for the even number channels is generated with the first half of the one scanning time-period employed as the target. Otherwise, the condition providing the inverse relationship is presented.
Still further, the following configuration may be allowable: The above-described data signal driving circuit includes an output channel selector for specifying a channel receiving the output, a data pulse converting circuit for converting in sequence the display data into the pulse-width signal, a reference clock generating circuit for generating a reference clock of the pulse-width signal, an output control circuit for outputting the pulse-width signal to the channel specified by the output channel selector, and an output buffer for converting electric potentials of xe2x80x9chighxe2x80x9d and xe2x80x9clowxe2x80x9d of the pulse-width signal into desired electric potentials so as to output the desired electric potentials as gray-scale voltage control signals, the pulse-width signal being outputted by the output control circuit.
Here, it is preferable that the above-described pulse-width of the pulse-width signal be set in compliance with the applied voltage-transmittance characteristic of the liquid crystal cell as well as with the gray-scale information of the display data.